1. Field of the Invention
The present invention relates in general to the field of signal processing, and, more specifically, to a system and method with inductor flyback detection using switch gate charge characteristic detection.
2. Description of the Related Art
Switching power converters, such as switching power supplies, switch mode converters, switch mode transformers, and switching amplifiers, control power output using one or more switches. Often the switching power converters include inductors. The inductors are initially charged with an inductor current that induces a magnetic field in the inductor and a voltage across the inductor. The voltage across the inductor opposes the inductor current. When the inductor current is interrupted, for example, by opening a switch, a magnetic field created by the inductor current begins to collapse. The collapsing magnetic field causes the inductor current to ramp-down, and the inductor voltage reverses. The reversed inductor voltage is commonly referred to as a “flyback” voltage. The time during which the inductor current begins ramping down until it stops decreasing is referred to as the inductor flyback time interval. The switching power converter operates in discontinuous current mode if the switching power converter allows the induced magnetic field to completely collapse and, thus, allows the inductor current to reach zero (0) amps. The switching power converter operates in continuous current mode if the switching power converter begins increasing the inductor current before the induced magnetic field completely collapses.
FIG. 1 depicts a power control system 100 that utilizes an inductor 110. The inductor 110 generates an inductor current when switch 108 is nonconductive, i.e. is “OFF”. The power control system 100 includes a switching power converter 102. The switching power converter 102 performs power factor correction and provides regulated voltage power to load 112. Voltage source 101 supplies an alternating current (AC) input voltage Vin(t) to a full, diode bridge rectifier 103. The voltage source 101 is, for example, a public utility, and the AC voltage Vin(t) is, for example, a 60 Hz/110 V line voltage in the United States or a 50 Hz/220 V line voltage in Europe. The rectifier 103 rectifies the input voltage Vin(t) and supplies a rectified, time-varying, line input voltage Vx(t) to the switching power converter 102.
The switch 108 of switching power converter 102 regulates the transfer of energy from the line input voltage Vx(t), through inductor 110, to capacitor 106. The inductor current iL ramps ‘up’ (i.e. increases) when the switch 108 conducts, i.e. is “ON”. Switch 108 is a field effect transistor (FET). Switch 108 is depicted as an n-channel device but can also be a p-channel device. The inductor current iL ramps down when switch 108 is OFF, and supplies inductor current iL to recharge capacitor 106. In at least one embodiment, the switching power converter 102 operates in discontinuous current mode, i.e. the inductor current iL ramp up time plus the inductor flyback time interval is less than the period of switch 108. Capacitor 106 supplies stored energy to load 112 while the switch 108 conducts. The capacitor 106 is sufficiently large so as to maintain a substantially constant output voltage Vc(t), as established by a power factor correction (PFC) and output voltage controller 114 (as discussed in more detail below). The output voltage Vc(t) remains substantially constant during constant load conditions. However, as load conditions change, the output voltage Vc(t) changes. The PFC and output voltage controller 114 responds to the changes in Vc(t) and adjusts the control signal CS0 to maintain a substantially constant output voltage as quickly as possible. The PFC and output voltage controller 114 includes a small capacitor 115 to filter any high frequency signals from the line input voltage Vx(t).
The power control system 100 also includes a PFC and output voltage controller 114 to control the switch 108 and, thus control power factor correction and regulate output power of the switching power converter 102. The goal of power factor correction technology is to make the switching power converter 102 appear resistive to the voltage source 101. Thus, the PFC and output voltage controller 114 attempts to control the inductor current iL so that the average inductor current iL is linearly and directly related to the line input voltage VX(t). Prodić, Compensator Design and Stability Assessment for Fast Voltage Loops of Power Factor Correction Rectifiers, IEEE Transactions on Power Electronics, Vol. 22, No. 5, September 2007, pp. 1719-1729 (referred to herein as “Prodić”), describes an example of PFC and output voltage controller 114. The PFC and output voltage controller 114 supplies a pulse width modified (PWM) control signal CS0 to control the conductivity of switch 108. In at least one embodiment, switch 108 is a field effect transistor (FET), and control signal CS0 is the gate voltage of switch 108. The values of the pulse width and duty cycle of control signal CSo depend on two feedback signals, namely, the line input voltage Vx(t) and the capacitor voltage/output voltage Vc(t).
PFC and output voltage controller 114 receives two feedback signals, the line input voltage Vx(t) and the output voltage Vc(t), via a wide bandwidth current loop 116 and a slower voltage loop 118. The current loop 116 operates at a frequency fc that is sufficient to allow the PFC and output controller 114 to respond to changes in the line input voltage Vx(t) and cause the inductor current iL to track the line input voltage to provide power factor correction. The current loop frequency is generally set to a value between 20 kHz and 150 kHz. The voltage loop 118 operates at a much slower frequency fv, typically 10-20 Hz. The capacitor voltage Vc(t) includes a ripple component having a frequency equal to twice the frequency of input voltage Vin(t), e.g. 120 Hz. Thus, by operating at 10-20 Hz, the voltage loop 118 functions as a low pass filter to filter the ripple component.
FIG. 2 depicts a class D amplifier 200, which represents another embodiment of a switching power converter. The class D amplifier 200 includes a controller 202 to generate respective control signals CS0 and CS1. Switches 208 and 210 are n-channel FETs but can also be p-channel devices. Control signals CS0 and CS1 charge and discharge the respective gates 204 and 206 of switches 208 and 210. When control signals CS0 and CS1 charge the respective gates 204 and 206, the respective gate voltages Vg0 and Vg1 increase and cause switches 208 and 210 to turn ON. When control signals CS0 and CS1 discharge respective gates 204 and 206, the respective gate voltages Vg0 and Vg1 decrease and cause switches 208 and 210 to turn OFF. Control signals CS0 and CS1 control switches 208 and 210 in a ‘non-overlapping’ manner so that switches 208 and 210 are not ON at the same time.
When switch 208 turns ON and switch 210 is OFF, an inductor current is supplied by voltage source V+ and generates a magnetic field in the inductor 212. The magnetic field induces a voltage across the inductor that opposes the inductor current. When switch 208 turns OFF and switch 210 turns ON, an inductor current is supplied by voltage source V−. The inductor current induces a reverse voltage across the inductor 212. Capacitor 214 provides a low pass filtering function and stabilizes the output voltage Vout. The class D amplifier 200 provides power to load 216, such as one or more audio speakers.
Detecting a time at which the inductor flyback time ends (“inductor flyback end time”) can be useful, for example, to control switch timing and ensuring a device operates in continuous current mode or discontinuous current mode. However, detection of the inductor flyback end time can be difficult and/or costly.